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- What does PHY refer to? - Electrical Engineering Stack Exchange
a PHY is a type of Ethernet physical layer (eg 100BASE-TX, 10BASE-T) a PHY is an Ethernet transceiver IC (eg an IC that converts 100BASE-TX to MII RMII) a PHY is a physical layer device (more than just the transceiver IC) Is PHY ambiguous and can refer to all of these or did I understand something wrong?
- What is the difference between the PHY sublayers PCS, PMA and PMD?
What is the difference between the PHY sublayers PCS, PMA and PMD? Ask Question Asked 8 months ago Modified 8 months ago
- what is the difference between PHY and MAC chip
A PHY chip or layer converts data between a "clean" clocked digital form which is only suitable for very-short-distance (i e inches) communication, and an analogue form which is suitable for longer range transmission It has no particular clue as to what any of the bits "mean", nor how they should be interpreted or assembled The MAC chip or layer receives bits from the PHY, detects packet
- Difference between USB and ULPI - Electrical Engineering Stack Exchange
What is the difference between USB and ULPI? I know they are closely related, but how they are related is not clear to me First time I came to know when I was looking at this board (See at the bot
- The SERDES transceiver design inside the Ethernet MAC controller
The 1st and 2nd figures are normal application which transmits the data through copper media with coded information (through PCS PMD PMA inside the PHY chip) The interface between the MAC and PHY is SGMII or XAUI for 1G and 10G base-T Ethernet However, the 3rd figure confuses me
- phy - Correct Ethernet Jack + Magnetics for 100Base-TX - Electrical . . .
I've been shopping around for Ethernet jacks for use in a personal project The part specifically states that it's internal PHYs are 100BASE-TX 10BASE-T Te IEEE 802 3 I understand the basic differ
- STM32F407 + LAN8720A + lwIP + FreeRTOS = No received Ethernet frames
I'm trying to bring up a PCB that uses an STM32F407 and LAN8720A Ethernet PHY, and I can't seem to receive any Ethernet frames — even though I have no problem transmitting frames Hardware setup I
- fpga - Problems in understanding PCIe blocks in Xilinx Vivado for . . .
These two PHY are actually different, that IP vendor's PHY is below PIPE interface, only contains PCS and PMA, while the PHY in TLP DL PHY also contains PHY-MAC Knowing this difference in different context makes things a bit clear I guess
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